CHAPTER 10 

MEMORY INTERFACE

A. FIGURE 10–1 A pseudo memory component illustrat ing the address, data, and control connections. (IC memori)

 

B. FIGURE 10–2 The pin-out of the 2716, 2K × 8 EPROM. (Courtesy of Intel Corporation.)

1. IC EPROM 2716/2732 (24-pin) 

2. PIN NAMES

3. MODE SELECTION

4. BLOCK DIAGRAM

C. FIGURE 10–3 The timing diagram of AC characteristics of the 2716 EPROM. (Courtesy of Intel Corporation.)

1. A.C. Characteristic

2. Capacitance

3. A.C. Test Conditions

4. WAVEFORMS

D. FIGURE 10–4 The pin-out of the TMS4016, 2K × 8 static RAM (SRAM). (Courtesy of Texas Instruments Incorporated.)

1. IC TMS4016

2. Pin Nomenclature

E. FIGURE 10–6 Pin diagram of the 62256, 32K × 8 static RAM.

1. IC memori SRAM 32K × 8

2. PIN FUNCTION

F. FIGURE 10–7 The pin-out of the TMS4464, 64K × 4 dynamic RAM (DRAM). (Courtesy of Texas Instruments Incorporated.)

1.  TMS4464

2. PIN NOMENCLATURE